Nandan Kumar Jha

Nandan Kumar Jha

PhD student at NYU CCS

New York University

About me

I am a PhD candidate at the Center for Cybersecurity, New York University (NYU), advised by Prof. Brandon Reagen. I’m broadly interested in cryptographically secure machine learning computation and work at the intersection of deep learning and applied cryptography (precisely, homomorphic encryption and multiparty computation) as a part of DPRIVE projects. My primary research focuses on co-designing deep neural networks and cryptographic primitives to achieve real-time inference on encrypted data. In addition to my research, I’ve also served as a (invited) reviewer for NeurIPS'23, ICLR'24, and CVPR'24.

Before joining NYU, I completed my M.Tech. from CSE IIT Hyderabad, where my research centered around the Hardware-Aware Co-Optimization of Deep Convolutional Neural Networks. Before this, I spent two years as an electrical design engineer at Seagate Technology Bangalore (INDIA), on a team of solid-state drive (SSD) development.

I wholeheartedly embrace collaborative opportunities, especially when our research interests align. If you think we could benefit from working together, don’t hesitate to shoot me an email expressing your interest!

  • Machine Learning Privacy and Security
  • Privacy-preserving Computation
  • Applied Cryptography
  • Ph.D. in Privacy-preserving Deep Learning, 2020 - present

    New York University

  • M.Tech. (Research Assistant) in Computer Science and Engineering, 2017 - 2020

    Indian Institute of Technology Hyderabad

  • B.Tech. in Electronics and Communication Engineering, 2009 - 2013

    National Institute of Technology Surat

Recent Publications

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(2023). Characterizing and Optimizing End-to-End Systems for Private Inference. In ASPLOS 2023.

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(2021). CryptoNite: Revealing the Pitfalls of End-to-End Private Inference at Scale. In Arxiv Preprint.

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(2020). DeepPeep: Exploiting Design Ramifications to Decipher the Architecture of Compact DNNs. In ACM JETC 2020.


(2020). Modeling Data Reuse in Deep Neural Networks by Taking Data-Types into Cognizance. In IEEE TC 2020.



Seagate Technology
Electrical Design Engineer
Sep 2015 – Jul 2017 Bangalore, INDIA

Responsibilities include:

  • Designing power delivery circuit for M.2 Solid State Drives.
  • Electrical characterization of DRAM and NAND modules
  • Signal Intergrity verification of DRAM/NAND datapath
IIT Bombay
Project Research Assistant
Nov 2014 – Jun 2015 Mumbai, INDIA
Worked on the deployment of wireless broadband in rural areas using the TV white Space (unused licensed band in UHF band)